On 6/6/21 9:16 AM, Michael Balzer wrote:
I've just found a spot-on post on this issue:
https://www.microchip.com/forums/tm.aspx?m=620741
Tom suggests implementing a state machine to reproduce the receive order. His analysis & solution looks sound to me.
Leave it to chip designers to (a) identify issues with their implementations and (b) provide a features to work around the issues. Poking around github, this rollver enabled driver might be a good reference: https://github.com/collin80/esp32_can/ Looks like it was added less than a year ago via this PR: https://github.com/collin80/esp32_can/pull/22 I'm using an (obsolete) chip for the J1850/Class B network in my 6th generation Corvette. I am using it with an atmega (running at 20 MHz) but the bus is only 10.4 kb/s and the part (HIP710) SPI master which precludes using SPI for anything else. I've been working on a J1850/CAN bridge so that ovms can access the bus; I had to step up to the atmega644/atmega1284 to pick up a second UART which can be used in SPI master mode for use with a MCP2515. But I haven't quite debugged my SPI2 code... Craig