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Wild thought, but perhaps the issue could be that the bus isn't
properly terminated, so the transmitter is constantly deferring to
what appears to be a busy bus?<br>
<br>
Greg<br>
<br>
<br>
<div class="moz-cite-prefix">Michael Balzer wrote:<br>
</div>
<blockquote type="cite"
cite="mid:ba4ada65-affc-fb7f-c7c1-7061d3a29a28@expeedo.de">That
looks like RX was working normally, but all TX was just queued.
<br>
<br>
Just a thought: is it possible the ESP32CAN TX buffer is sometimes
unavailable on the first frame transmission (or appears to be),
not due to an actual frame blocking the buffer, but due to some
kind of init race condition?
<br>
<br>
That would lead to esp32can::WriteFrame() returning FAIL causing
the frame to be queued in m_txqueue, but as there is no real TX
going on at that moment, there never will be a TX callback, so the
m_txqueue will grow indefinitely from there on.
<br>
<br>
Regards,
<br>
Michael
<br>
<br>
<br>
Am 14.04.22 um 00:51 schrieb Craig Leres:
<br>
<blockquote type="cite">Here is can bus status for my Corvette
after 4 run cycles in which it was never able to transmit frames
on can1.
<br>
<br>
Craig
<br>
<br>
OVMS# can can1 status
<br>
CAN: can1
<br>
Mode: Active
<br>
Speed: 500000
<br>
DBC: none
<br>
<br>
Interrupts: 5115225
<br>
Rx pkt: 4236787
<br>
Rx ovrflw: 0
<br>
Tx pkt: 0
<br>
Tx delays: 30
<br>
Tx ovrflw: 28916
<br>
Tx fails: 840
<br>
<br>
Err flags: 0x00000000
<br>
Rx err: 0
<br>
Tx err: 0
<br>
Rx invalid: 0
<br>
Wdg Resets: 0
<br>
Wdg Timer: 3 sec(s)
<br>
Err Resets: 0 </blockquote>
<br>
<br>
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